Reference Manual · Publication 1756-RM085 · Rockwell Automation

Converting PLC-5 or SLC 500 Logic to Logix-Based Logic

Publication 1756-RM085 is a Rockwell Automation reference manual covering the conversion of PLC-5 and SLC 500 ladder logic to Logix-based projects using the Logix Designer Export tool. It addresses program structure conversion, data file type mapping, instruction translation, and post-migration tasks such as I/O mapping and MSG configuration. The manual applies to 1756 ControlLogix, 1756 GuardLogix, 1769 CompactLogix, 1769 Compact GuardLogix, 1789 SoftLogix, 5069 CompactLogix, and 5069 Compact GuardLogix controllers. Engineers migrating legacy PLC-5 or SLC 500 programs to Studio 5000 Logix Designer are the primary audience.

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1756-RM085I-EN-P Publication Revision
1756, 1769, 1789, 5069… Supported Controllers
PLC-5 Legacy Platforms Covered
32-bit Logix Controller Word Width

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Specifications

Architecture Differences: PLC-5/SLC 500 vs. Logix

CPU word size (PLC-5/SLC 500) 16-bit operations
CPU word size (Logix) 32-bit operations
Timer time base (PLC-5/SLC 500) 1 sec or 10 msec
Timer time base (Logix) 1 msec fixed
I/O update model (PLC-5/SLC 500) Synchronous to program scan
I/O update model (Logix) Asynchronous to logic scan
Data access (PLC-5/SLC 500) Global data tables accessed by address
Data access (Logix) Tag-based; local and global scope supported
I/O addressing (PLC-5) Base 8 (octal)
I/O addressing (SLC 500 and Logix) Base 10 (decimal)
Operating system (Logix) Preemptive multitasking, IEC 61131-3 compliant

Data File Type Conversions

O / I (Output / Input) INT array, Radix: Binary
S (Status) INT array, Radix: Hex; PCE generated per S address
B (Binary) DINT array, Radix: Binary; 16-bit sign-extended to 32-bit
T (Timer) Array of Timer structures; PRE/ACC scaled to 1 msec; PCE generated
C (Counter) COUNTER structure array; PCE on OV/UN bit references
R (Control) CONTROL structure array
N (Integer) DINT array, Radix: Decimal; 16-bit sign-extended to 32-bit
F (Floating Point) REAL array
A (ASCII) INT array, Radix: Hex
D (Decimal) DINT array, Radix: Hex; 16-bit zero-filled to 32-bit
BT (Block-Transfer) Individual MESSAGE structures (not array); PC5 only
M0 / M1 INT array
MG (Message) Individual MESSAGE structures; PC5 only
PD (PID) PID structure array
ST (ASCII String) STRING array; 1 INT (LEN) + SINT[82] (STR)
CT (ControlNet) MESSAGE structures; PC5 only
SC (SFC Status) User-Defined Type (SC_UDT) array; PCE generated

Continuous Task Defaults Created by Logix Designer Export

Task name MainTask
Default watchdog 500 msec
Program name MainProgram
Main routine name MainRoutine
Status subroutine name StatusFile

Communication Protocols

Supported industrial networks and field buses for the products covered by this publication.

EtherNet/IP All remote I/O generated by the Logix Designer Export is placed on EtherNet/IP when the Place I/O modules in remote racks option is selected. MSG (Message Instructions) Logix 5000 controllers support MSG instructions of various types. Logix Designer Export only partially converts MSG instructions; the Communication tab must be completed manually after migration. Block-Transfer (BTR/BTW) PLC-5 and SLC 500 BTR/BTW instructions are converted to MESSAGE structures. After conversion, use BTD, MOV, or CPS instructions to map I/O data into converted tag structures. ControlNet I/O (CIO) PLC-5 CIO instructions reference CT file types; converted to MESSAGE structures. CIR/COR instructions are flagged as not supported (PCE 119).

Document Contents

Full PDF covers the following topics in detail:

  • Chapter 1: Converting a PLC-5 or SLC 500 Program into a Logix Project
  • Chapter 2: Converting Program Structure
  • Chapter 3: Converting Data
  • Chapter 4: Converting Instructions
  • Chapter 5: Programming Conversion Errors (PCE) Messages

In-Stock Products Covered by This Document

Every product below is in stock at our Charlotte, NC warehouse and covered by this publication. Ships same-day (orders before 4 PM ET) with 2.5-year warranty included.

1756-EN2T
1756-EN2T
Allen-Bradley 1756-EN2T ControlLogix Module
$1,508.15
1756-ENBT
1756-ENBT
Allen-Bradley 1756-ENBT ControlLogix Module
$1,357.80

Frequently Asked Questions

What does the Logix Designer Export tool actually convert?
The Logix Designer Export converts only ladder logic instructions from RSLogix 5 (PLC-5) or RSLogix 500 (SLC 500) projects into a Studio 5000 Logix Designer .ACD file. SFC and structured text files are not converted.
What is a PCE instruction and how do I resolve it?
A Possible Conversion Error (PCE) instruction is inserted by the Logix Designer Export into the ladder rung where a potential conversion error occurred. To locate all PCE instructions, run Verify > Controller in the Logic menu; the error checker will identify each occurrence. Once found, delete each PCE instruction and replace it with correct, validated logic.
What is a UNK instruction?
A UNK instruction appears in the converted Logix project when the Logix Designer Export encounters a PLC-5 or SLC 500 instruction that has no equivalent in the Logix architecture. You must delete each UNK instruction and replace it with appropriate corrected logic.
How are PLC-5 timer presets and accumulators converted to Logix?
PLC-5 and SLC 500 timers support time bases of 1 sec or 10 msec. Logix controllers use a fixed 1 msec time base. The Logix Designer Export scales PRE and ACC values accordingly. For example, a PLC-5 timer with a 0.01 sec time base and a preset of 20 converts to a Logix preset of 200 (1 msec time base). Each logic reference to a PRE or ACC value generates a PCE instruction requiring validation.
How is I/O data mapped after conversion?
The Logix Designer Export creates INT arrays named I and O to represent input and output image tables. These arrays are empty after conversion. You must add I/O modules to the controller tree, then use BTD, MOV, or CPS instructions to map the Logix I/O tags into the converted I and O arrays. CPS is most efficient when consecutive I/O groups map to consecutive array elements.
How are PLC-5 data table files addressed in Logix after conversion?
Data table file addresses are converted to array tag references. For example, PLC-5 address N7:500 converts to N7[500], R6:100 converts to R6[100], I:002 converts to I[2], and O:001 converts to O[1]. Alias tags based on the original physical addresses are also created to preserve the original naming.
Does the Logix Designer Export handle MSG instructions completely?
No. The Logix Designer Export only partially converts MSG instructions. After migration, you must use the Logix Designer application to configure each MSG instruction by completing the information on the Communication tab. A PCE 150 message is generated for each MSG instruction found, indicating that the MESSAGE tag must be manually verified.

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